UNIDENTIFIED PETER-286 Processor 80286 Processor Speed 10/12MHz Chip Set Headland Max. Onboard DRAM 4MB Cache None BIOS AMI/Award Dimensions 218mm x 218mm I/O Options None NPU Options 80287 [Image] CONNECTIONS Purpose Location Purpose Location Power LED & Keylock J1 Turbo switch J4 Speaker J2 Turbo LED J6 Reset switch J3 USER CONFIGURABLE SETTINGS Function Jumper/Switch Position » DRAM speed select 0 wait JP1 Closed states DRAM speed select 1 wait JP1 Open state » Parity check enabled JP2 Closed Parity check disabled JP2 Open » Monitor type select SW1/switch 1 Off monochrome Monitor type select color SW1/switch 1 On DRAM CONFIGURATION Size Bank 0 P-0 Bank 1 P-1 Bank 2 Bank 3 512KB (4) (2) NONE NONE NONE NONE 44256 41256 640KB (4) (2) (4) 4464 (2) 4164 NONE NONE 44256 41256 1MB (4) (2) (4) (2) NONE NONE 44256 41256 44256 41256 2MB NONE NONE NONE NONE (2) 1M NONE x 9 4MB NONE NONE NONE NONE (2) 1M (2) 1M x 9 x 9 DRAM SWITCH CONFIGURATION Size DRAM type SW1/2 SW1/3 SW1/4 0KB (Test DIP On On On only) 512KB DIP On On Off 640KB DIP On Off On 1MB DIP On Off Off 512KB SIPP Off On On 640KB SIPP Off On Off 2MB SIPP Off Off On 4MB SIPP Off Off Off