AUVA COMPUTER, INC.

CAM 33-U0/CAM 50-U0

Processor         80486SX/80487SX/80486DX
Processor Speed   33/50MHz
Chip Set          Unidentified
Max. Onboard DRAM 32MB
Cache             32/64/128/256KB
BIOS              AMI
Dimensions        330mm x 218mm
I/O Options       None
NPU Options       4167

[Image]

                                CONNECTIONS

  Purpose                   Location   Purpose                   Location

  Reset switch                JP1      Turbo switch                JP4

  Speaker                     JP2      Turbo LED                   JP5

  Power LED & keylock         JP3      External battery           JP25

                        USER CONFIGURABLE SETTINGS

                Function                     Jumper          Position

  »   CPU speed select 33MHz                  JP19           pins 2 & 3
                                                              closed

      CPU speed select 50MHz                  JP19           pins 1 & 2
                                                              closed

  »   Factory configured - do not alter       JP20            Closed

  »   Monitor type select color               JP26            Closed

      Monitor type select monochrome          JP26             Open

  »   CMOS memory normal operation            JP27           pins 1 & 2
                                                              closed

      CMOS memory clear                       JP27           pins 2 & 3
                                                              closed

              DRAM CONFIGURATION

      Size          Bank 0          Bank 1

      1MB         (4) 256K x 9       NONE

      2MB         (4) 256K x 9   (4) 256K x 9

      4MB         (4) 1M x 9         NONE

      5MB         (4) 256K x 9    (4) 1M x 9

      8MB         (4) 1M x 9      (4) 1M x 9

      16MB        (4) 4M x 9         NONE

      20MB        (4) 1M x 9      (4) 4M x 9

      32MB        (4) 4M x 9      (4) 4M x 9

                            CACHE CONFIGURATION

    Size         Cache        Location      TAG SRAM         Location

    32KB       (4) 8K x 8     U2,U4,U8 &    (4) 16K x    U6,U12,U13 & U17
                                 U10            4

    64KB       (8) 8K x 8        ALL        (3) 16K x      U6,U13 & U17
                                                4

    128KB      (4) 32K x      U2,U4,U8 &    (3) 16K x      U6,U13 & U17
                   8             U10            4

    256KB      (8) 32K x         ALL        (3) 16K x      U6,U13 & U17
                   8                            4

                 CACHE JUMPER CONFIGURATION

   Size       JP6       JP7       JP10      JP11      JP12

   32KB      2 & 3     Open      1 & 2     1 & 2     1 & 2

   64KB      1 & 2     Open      1 & 2     1 & 2     2 & 3

  128KB      2 & 3     1 & 2     2 & 3     1 & 2     2 & 3

  256KB      1 & 2     2 & 3     2 & 3     2 & 3     2 & 3

  Note: Pins designated should be in the closed position.

                          CPU TYPE CONFIGURATION

     Type           JP14            JP17          JP18           JP21

    80486SX       pins 2 & 3        Open          Open          Closed
                   closed

    80487SX       pins 1 & 2     pins 2 & 3      Closed          Open
                   closed          closed

    80486DX       pins 1 & 2     pins 1 & 2      Closed          Open
                   closed          closed