UNIDENTIFIED

80286 MAIN BOARD

Processor         80286
Processor Speed   8/12/16MHz
Chip Set          UMC
Max. Onboard DRAM 4MB
Cache             None
BIOS              AMI
Dimensions        220mm x 220mm
I/O Options       None
NPU Options       80287

[Image]

                                CONNECTIONS

  Purpose                   Location    Purpose                  Location

  Turbo LED                   JP1       Reset switch              JP10

  Power LED & keylock         JP4       Turbo switch              JP12

  External battery            JP8       Speaker                   JP13

                        USER CONFIGURABLE SETTINGS

                Function                     Jumper          Position

  »   BIOS type select 27128                  JP2           pins 1 & 2
                                                              closed

      BIOS type select 27256                  JP2           pins 2 & 3
                                                              closed

  »   Monitor type select monochrome          JP3           pins 1 & 2
                                                              closed

      Monitor type select color               JP3           pins 2 & 3
                                                              closed

  »   Battery type select internal            JP7           pins 2 & 3
                                                              closed

      Battery type select external            JP7           pins 1 & 2
                                                              closed

  »   Power good signal detect from           JP9           pins 2 & 3
      board                                                   closed

      Power good signal detect from           JP9           pins 1 & 2
      power supply                                            closed

  »   Turbo switch disabled                   JP12            Closed

      Turbo switch enabled                    JP12             Open

  »   Parity check disabled                   JP14          pins 2 & 3
                                                              closed

      Parity check enabled                    JP14          pins 1 & 2
                                                              closed

       DRAM CONFIGURATION (SIPP MEMORY)

      Size          Bank 0          Bank 1

     512KB        (2) 256K x 9       NONE

      1MB         (2) 256K x 9   (2) 256K x 9

      2MB         (2) 1M x 9         NONE

      4MB         (2) 1M x 9      (2) 1M x 9

                DRAM CONFIGURATION (DIP MEMORY)

    Size       Bank 0A      Parity A     Bank 1B     Parity B

    512KB     (4) 44256    (2) 41256      NONE         NONE

    640KB     (4) 44256    (2) 41256    (4) 4464     (2) 4164

     1MB      (4) 44256    (2) 41256    (4) 44256    (2) 41256

                  DRAM CONFIGURATION (DIP & SIMM MEMORY)

   Size      Bank 0    Bank 1    Bank 0A   Parity A     Bank    Parity B
                                                        1B

   640KB       (2)      NONE       (4)     (2) 4164    NONE       NONE
             256K x               4464
               9

                   DRAM SWITCH CONFIGURATION

      Size           SW1/1           SW1/2          SW1/3

  512KB (SIPP)        On              On             Off

  512KB (DIPP)        On              On              On

     640KB            On              Off            Off

      1MB             On              Off             On

      2MB             Off             On              On

      4MB             Off             Off             On

  DRAM WAIT STATE CONFIGURATION

   Wait states         SW1/4

  0 wait states         Off

  1 wait state          On