MICRO EXPRESS, INC. FOREX 386/486 (REV. B2/B3) Processor 80386DX/80486SX/80487SX/80486DX /80486DX2 Processor Speed 20/25/33/40/50(internal)/50/66(internal)MHz Chip Set FOREX Max. Onboard DRAM32MB Cache 64/128/256KB BIOS AMI Dimensions 330mm x 218mm I/O Options None NPU Options 80387DX/3167 [Image] CONNECTIONS Purpose Location Purpose Location External battery JP2 Speaker JP10 Reset switch JP8 Turbo switch JP15 Power LED & keylock JP9 Turbo LED JP16 USER CONFIGURABLE SETTINGS Function Jumper Position » Factory configured - do not 2E N/A alter » Factory configured - do not JP5 N/A alter » CMOS memory normal operation JP6 Open CMOS memory clear JP6 Closed Note: The location of JP5 is unidentified. DRAM CONFIGURATION Size Bank 0 Bank 1 1MB (4) 256K x 9 NONE 2MB (4) 256K x 9 (4) 256K x 9 4MB (4) 1M x 9 NONE 5MB (4) 256K x 9 (4) 1M x 9 8MB (4) 1M x 9 (4) 1M x 9 16MB (4) 4M x 9 NONE 20MB (4) 1M x 9 (4) 4M x 9 32MB (4) 4M x 9 (4) 4M x 9 CACHE CONFIGURATION Size Bank 0 Bank 1 TAG 0 TAG 1 64KB (4) 8K x 8 (4) 8K x 8 (1) 8K x 8 NONE 128KB (4) 32K x 8 NONE (1) 8K x 8 NONE 256KB (4) 32K x 8 (4) 32K x 8 NONE (1) 32K x 8 CACHE JUMPER CONFIGURATION Size JP8A JP8B JP8C JP8E JP8F 64KB 2 & 3 1 & 2 1 & 2 2 & 3 1 & 2 128KB 1 & 2 2 & 3 2 & 3 1 & 2 1 & 2 256KB 2 & 3 1 & 2 1 & 2 1 & 2 2 & 3 Note: Pins desingated should be in the closed position. CPU TYPE CONFIGURATION Type JP12 JP13 JP30 80486SX pins 2 & 3 pins 2 & 3 pins 2 & 3 closed closed closed 80487SX pins 1 & 2 pins 1 & 2 pins 2 & 3 closed closed closed 80486DX pins 1 & 2 pins 1 & 2 pins 1 & 2 closed closed closed 80486DX2 pins 1 & 2 pins 1 & 2 pins 1 & 2 closed closed closed CPU TYPE CONFIGURATION Type 1A 1C 1D 1E 1F 1G 2A 80386 2 & 3 2 & 3 2 & 3 2 & 3 2 & 3 2 & 3 2 & 3 80486 1 & 2 1 & 2 1 & 2 1 & 2 1 & 2 1 & 2 1 & 2 Note: Pins designated should be in the closed position. The location of W1X & W2X are unidentified. CPU TYPE CONFIGURATION (CON’T) Type 2C 2D 2G 2H W1B W1X W2X 80386 2 & 3 2 & 3 2 & 3 2 & 3 2 & 3 2 & 3 2 & 3 80486 1 & 2 1 & 2 1 & 2 1 & 2 1 & 2 1 & 2 1 & 2 Note: Pins designated should be in the closed position. The location of W1X & W2X are unidentified. CPU CLOCK SPEED CONFIGURATION Speed JP7A JP7B JP7C JP7D 20MHz pins 2 & 3 pins 1 & 2 pins 1 & 2 pins 2 & 3 closed closed closed closed 25MHz pins 1 & 2 pins 2 & 3 pins 1 & 2 pins 2 & 3 closed closed closed closed 33MHz pins 1 & 2 pins 1 & 2 pins 2 & 3 pins 2 & 3 closed closed closed closed 40MHz pins 2 & 3 pins 2 & 3 pins 1 & 2 pins 2 & 3 closed closed closed closed 50iMHz pins 1 & 2 pins 2 & 3 pins 1 & 2 pins 2 & 3 closed closed closed closed 50MHz pins 2 & 3 pins 1 & 2 pins 2 & 3 pins 2 & 3 closed closed closed closed 66iMHz pins 1 & 2 pins 1 & 2 pins 2 & 3 pins 1 & 2 closed closed closed closed 80MHz pins 2 & 3 pins 2 & 3 pins 1 & 2 pins 1 & 2 closed closed closed closed