ACER, INC. V-12 Processor 80486SX/80486DX/80486DX2 Processor Speed 25/33/40/50(internal)/50/66(internal)MHz Chip Set Unidentified Video Chip Set None Maximum Onboard Memory 128MB Maximum Video Memory None Cache 128/256KB BIOS Unidentified Dimensions 254mm x 218mm I/O Options 32-bit VESA local bus slots (3), green PC connector NPU Options None [Image] CONNECTIONS Purpose Location Purpose Location External battery JP6 Green PC connector JP12 pins 15 - 17 Power LED & JP12 pins 1 - Reset switch JP12 pins 19 & keylock 5 20 Speaker JP12 pins 7 - Chassis fan power JP30 10 Green PC LED JP12 pins 12 32-bit VESA local SL1 - SL3 & 13 bus slots USER CONFIGURABLE SETTINGS Function Label Position » Factory configured - do not JP4 Unidentified alter » CMOS memory normal operation JP5 Open CMOS memory clear JP5 Pins 2 & 3 closed » Factory configured - do not JP7 Unidentified alter » Factory configured - do not JP8 Unidentified alter » Factory configured - do not JP10 Unidentified alter » Factory configured - do not JP36 Unidentified alter DRAM CONFIGURATION Size Bank 0 Bank 1 1MB (4) 256K x 9 None 1MB None (4) 256K x 9 2MB (4) 256K x 9 (4) 256K x 9 4MB (4) 1M x 9 None 4MB None (4) 1M x 9 5MB (4) 256K x 9 (4) 1M x 9 5MB (4) 1M x 9 (4) 256K x 9 8MB (4) 1M x 9 (4) 1M x 9 16MB (4) 4M x 9 None 16MB None (4) 4M x 9 17MB (4) 256K x 9 (4) 4M x 9 17MB (4) 4M x 9 (4) 256K x 9 20MB (4) 1M x 9 (4) 4M x 9 20MB (4) 4M x 9 (4) 1M x 9 32MB (4) 4M x 9 (4) 4M x 9 64MB (4) 16M x 9 None 65MB (4) 16M x 9 (4) 256K x 9 68MB (4) 16M x 9 (4) 1M x 9 80MB (4) 16M x 9 (4) 4M x 9 128MB (4) 16M x 9 (4) 16M x 9 Note: The location of banks 0 & 1 are unidentified. CACHE CONFIGURATION Size Bank 0 Bank 1 128KB (4) 32K x 8 None 256KB (4) 32K x 8 (4) 32K x 8 Note: The location of banks 0 & 1 are unidentified. CACHE JUMPER CONFIGURATION Size JP1 JP2 JP3 128KB Pins 2 & 3 Pins 2 & 3 Pins 1 & 2 closed closed closed 256KB Pins 1 & 2 Pins 1 & 2 Pins 2 & 3 closed closed closed CPU SPEED SELECTION Speed JP11 25MHz Pins 1 & 2, 3 & 4, 5 & 6 closed 33MHz Pins 1 & 2, 3 & 4 closed 40MHz Pins 1 & 2, 5 & 6 closed 50iMHz Pins 1 & 2, 3 & 4, 5 & 6 closed 50MHz Pins 1 & 2 closed 66iMHz Pins 1 & 2, 3 & 4 closed VL BUS SPEED SELECTION Speed JP14 <= 33MHz Pins 1 & 2 closed >33 MHz Pins 3 & 4 closed